Specify BL31 runtime console for ARM Standard platforms
authorSoby Mathew <[email protected]>
Wed, 9 Dec 2015 11:38:43 +0000 (11:38 +0000)
committerSoby Mathew <[email protected]>
Wed, 9 Dec 2015 17:29:55 +0000 (17:29 +0000)
This patch overrides the default weak definition of
`bl31_plat_runtime_setup()` for ARM Standard platforms to
specify a BL31 runtime console. ARM Standard platforms are
now expected to define `PLAT_ARM_BL31_RUN_UART_BASE` and
`PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ` macros which is required
by `arm_bl31_plat_runtime_setup()` to initialize the runtime
console.

The system suspend resume helper `arm_system_pwr_domain_resume()`
is fixed to initialize the runtime console rather than the boot
console on resumption from system suspend.

Fixes ARM-software/tf-issues#220

Change-Id: I80eafe5b6adcfc7f1fdf8b99659aca1c64d96975

docs/porting-guide.md
include/plat/arm/board/common/board_css_def.h
include/plat/arm/common/plat_arm.h
plat/arm/board/fvp/include/platform_def.h
plat/arm/common/arm_bl31_setup.c
plat/arm/common/arm_pm.c

index 2f71d80a95ac60516e13d536049f3549fe30951a..ba550f04649f7b5532fb5e885439818eae15bf3b 100644 (file)
@@ -1182,6 +1182,10 @@ setup just prior to BL31 exit during cold boot. The default weak
 implementation of this function will invoke `console_uninit()` which will
 suppress any BL31 runtime logs.
 
+In ARM Standard platforms, this function will initialize the BL31 runtime
+console which will cause all further BL31 logs to be output to the
+runtime console.
+
 
 ### Function : bl31_get_next_image_info() [mandatory]
 
index 2e32b41c533d3433acfb7643d32d4e611dc3ad6c..975f1fc55d8fbe386d2cf102abc1155d0e55f43d 100644 (file)
 #define PLAT_ARM_BOOT_UART_BASE                        SOC_CSS_UART0_BASE
 #define PLAT_ARM_BOOT_UART_CLK_IN_HZ           SOC_CSS_UART0_CLK_IN_HZ
 
-#define PLAT_ARM_CRASH_UART_BASE               SOC_CSS_UART1_BASE
-#define PLAT_ARM_CRASH_UART_CLK_IN_HZ          SOC_CSS_UART1_CLK_IN_HZ
+#define PLAT_ARM_BL31_RUN_UART_BASE            SOC_CSS_UART1_BASE
+#define PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ       SOC_CSS_UART1_CLK_IN_HZ
+
+#define PLAT_ARM_CRASH_UART_BASE               PLAT_ARM_BL31_RUN_UART_BASE
+#define PLAT_ARM_CRASH_UART_CLK_IN_HZ          PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ
 
 #define PLAT_ARM_TSP_UART_BASE                 V2M_IOFPGA_UART0_BASE
 #define PLAT_ARM_TSP_UART_CLK_IN_HZ            V2M_IOFPGA_UART0_CLK_IN_HZ
index aadf58d838b26846f45e73226b658092372e4fde..ed65d05bfaaec318e506685959cc2e3a3d395e38 100644 (file)
@@ -170,6 +170,7 @@ uint32_t arm_get_spsr_for_bl33_entry(void);
 void arm_bl31_early_platform_setup(bl31_params_t *from_bl2,
                                void *plat_params_from_bl2);
 void arm_bl31_platform_setup(void);
+void arm_bl31_plat_runtime_setup(void);
 void arm_bl31_plat_arch_setup(void);
 
 /* TSP utility functions */
index 9ada6b2aa33672299703108a3b7775eaff873e67..203f7b7e51662220fca790a7a13d66c8a856ce19 100644 (file)
 #define PLAT_ARM_BOOT_UART_BASE                V2M_IOFPGA_UART0_BASE
 #define PLAT_ARM_BOOT_UART_CLK_IN_HZ   V2M_IOFPGA_UART0_CLK_IN_HZ
 
-#define PLAT_ARM_CRASH_UART_BASE       V2M_IOFPGA_UART1_BASE
-#define PLAT_ARM_CRASH_UART_CLK_IN_HZ  V2M_IOFPGA_UART1_CLK_IN_HZ
+#define PLAT_ARM_BL31_RUN_UART_BASE            V2M_IOFPGA_UART1_BASE
+#define PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ       V2M_IOFPGA_UART1_CLK_IN_HZ
+
+#define PLAT_ARM_CRASH_UART_BASE       PLAT_ARM_BL31_RUN_UART_BASE
+#define PLAT_ARM_CRASH_UART_CLK_IN_HZ  PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ
 
 #define PLAT_ARM_TSP_UART_BASE         V2M_IOFPGA_UART2_BASE
 #define PLAT_ARM_TSP_UART_CLK_IN_HZ    V2M_IOFPGA_UART2_CLK_IN_HZ
index 8682fd19a88de10af8b5ea8da5be662ad58d809d..28268252f5db72824269a64c4d3205932c501014 100644 (file)
@@ -224,11 +224,27 @@ void arm_bl31_platform_setup(void)
        plat_arm_pwrc_setup();
 }
 
+/*******************************************************************************
+ * Perform any BL3-1 platform runtime setup prior to BL3-1 exit common to ARM
+ * standard platforms
+ ******************************************************************************/
+void arm_bl31_plat_runtime_setup(void)
+{
+       /* Initialize the runtime console */
+       console_init(PLAT_ARM_BL31_RUN_UART_BASE, PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ,
+                       ARM_CONSOLE_BAUDRATE);
+}
+
 void bl31_platform_setup(void)
 {
        arm_bl31_platform_setup();
 }
 
+void bl31_plat_runtime_setup(void)
+{
+       arm_bl31_plat_runtime_setup();
+}
+
 /*******************************************************************************
  * Perform the very early platform specific architectural setup here. At the
  * moment this is only intializes the mmu in a quick and dirty way.
index cae65970fb66ee189e82c35b8fc709d570368c20..679dd6b6e539e34f42fb307e21a0cb744b69b0b6 100644 (file)
@@ -158,7 +158,7 @@ int arm_validate_ns_entrypoint(uintptr_t entrypoint)
  *****************************************************************************/
 void arm_system_pwr_domain_resume(void)
 {
-       console_init(PLAT_ARM_BOOT_UART_BASE, PLAT_ARM_BOOT_UART_CLK_IN_HZ,
+       console_init(PLAT_ARM_BL31_RUN_UART_BASE, PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ,
                                                ARM_CONSOLE_BAUDRATE);
 
        /* Assert system power domain is available on the platform */